Formal Methods in
Computer-Aided Design
2-6 October, 2017
TU Wien, Vienna, Austria

Helmut Veith Symposium

Date & time: October 6, 9am to 1pm
Location: TU Wien, Kontaktraum, Gußhausstr. 27-29, 1040 Vienna (6th floor)

This year's FMCAD hosts a Symposium in Memoriam Helmut Veith, a brilliant researcher, inspiring collaborator, passionate mentor, generous friend, valued member of our community and FMCAD co-chair in 2016, who tragically passed away in March last year. The Symposium features presentations of invited contributions published in the Special Issue of the journal on Formal Methods in System Design in Memoriam Helmut Veith, covering topics such as model checking, synthesis, distributed algorithms, and security.


LogicLounge: Teaching Logic in Computer Science

The Symposium will end with a panel discussion with Michael Huth and Janos Makowsky, moderated by Laura Kovács, on Logic in Computer Science: A Teaching Perspective. The panel session is an event in the LogicLounge series which features one-hour discussions with internationally renowned scientists from the fields of logic, computer science and philosophy, targeting a broad audience interested in computer science.
Helmut Veith was passionate about improving education in logic and computer science and established a master's program on Logic and Computation and a doctoral college on Logical Methods in Computer Science at TU Wien. The LogicLounge on Logic in Computer Science: A Teaching Perspective honors Helmut's contribution to the education of numerous young researchers.



9:00 – 9:30 Para^2: Parameterized Path Reduction, Acceleration, and SMT for Reachability in Threshold-Guarded Distributed Algorithms
Igor Konnov, Marijana Lazic, Helmut Veith, Josef Widder
9:30 – 10:00 On Compiling Boolean Circuits Optimized for Secure Multi-party Computation
Niklas Büscher, Martin Franz, Andreas Holzer, Stefan Katzenbeisser, Helmut Veith
10:00 – 10:30 Shield Synthesis
Bettina Könighofer, Mohammed Alshiekh, Roderick Bloem, Robert Könighofer, Ufuk Topcu
10:30 – 11:00 Coffee Break
11:00 – 11:30 Program Synthesis for Interactive-Security Systems
William Harris, Somesh Jha, Thomas Reps, Sanjit Seshia
11:30 – 12:00 A Methodology to Take Credit for High-Level Verification During RTL Verification
Frederic Doucet, R. P. Kurshan
12:00 – 12:15 Grab a sandwich
12:15 – 13:15 LogicLounge (LogicLunch) with Michael Huth and Janos Makowsky


The Helmut Veith Symposium will take place in the Kontaktraum on the 6th floor of Gußhausstraße 27-29, 1040 Vienna.


This event is sponsored by the Vienna Center for Logic and Algorithms (VCLA)


This event is open to the general public and attendance is free.